Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-10-18
2005-10-18
Garbowski, Leigh M. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06957410
ABSTRACT:
Some embodiments provide a method of routing nets in a region of an integrated-circuit layout. This method initially identifies a characteristic of the region, and then selects a wiring model from a set of wiring models, based on the identified characteristic. Each wiring models specifies a set of routing directions. The method then routes the nets based on the selected wiring model.
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Buset Oscar
Teig Steven
Cadence Design Systems Inc.
Garbowski Leigh M.
Rossoshek Helen
Stattler, Johansen and Adeli LLP
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