Electrical computers and digital processing systems: support – Computer power control – Power conservation
Reexamination Certificate
2006-04-11
2006-04-11
Cao, Chun (Department: 2115)
Electrical computers and digital processing systems: support
Computer power control
Power conservation
C713S320000
Reexamination Certificate
active
07028200
ABSTRACT:
A method and apparatus are disclosed for performing adaptive memory power management in a system employing a CPU and a memory subsystem. A CPU throttle control (THR) module generates a CPU throttle control signal indicating when the CPU is idle. A memory controller (MC) module generates memory power management signals based on at least one of the CPU throttle control signal, memory read/write signals, memory access break events, and bus master access requests. Certain portions of the memory subsystem are powered down in response to the memory power management signals. Memory power management is performed on a time segment by time segment basis to achieve efficient power management of the memory subsystem during CPU run time.
REFERENCES:
patent: 5546568 (1996-08-01), Bland et al.
patent: 6125450 (2000-09-01), Kardach
patent: 6141283 (2000-10-01), Bogin et al.
patent: 6269433 (2001-07-01), Jones et al.
patent: 6304978 (2001-10-01), Horigan et al.
patent: 6385113 (2002-05-01), Longwell et al.
patent: 6389514 (2002-05-01), Rokicki
patent: 6442698 (2002-08-01), Nizar
patent: 6449683 (2002-09-01), Silvester
patent: 6618791 (2003-09-01), Dodd et al.
patent: 6633987 (2003-10-01), Jain et al.
patent: 6678831 (2004-01-01), Mustafa et al.
patent: 6775784 (2004-08-01), Park
patent: 6781911 (2004-08-01), Riesenman et al.
patent: 6795896 (2004-09-01), Hart et al.
patent: 2001/0044909 (2001-11-01), Oh et al.
patent: 2002/0194509 (2002-12-01), Plante et al.
patent: WO 01/73529 (2001-10-01), None
Compaq/Intel/Microsoft/Phoenix/Toshiba: “Advanced Configuration and Power Interface Specification Rev 2.0 Excerpts (pp21-26, 211-230)” ACPI Specification, Online, Jul. 27, 2000, Retrieved from the Internet Mar. 9, 2004.
Compaq Computer Corporation, Intel Corporation, Microsoft Corporation, Phoenix Technologies Ltd., Toshiba Corporation,Advanced Configuration and Power Interface Specification, Revision 1.0b(Feb. 2, 1999).
Jedec Standard Double Data Rate (DDR) SDRAM Specfication,JESD79, Jedec Solid State Technology Association, Release 1(Jun. 2000).
Broadcom Corporation
Cao Chun
McAndrews Held & Malloy Ltd.
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