Data processing: generic control systems or specific application – Specific application – apparatus or process – Article handling
Reexamination Certificate
2000-11-17
2002-08-06
Valenza, Joseph E. (Department: 3651)
Data processing: generic control systems or specific application
Specific application, apparatus or process
Article handling
C414S222040, C414S226010, C414S936000, C438S680000
Reexamination Certificate
active
06430468
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a method and apparatus for the accurate placement of semiconductor wafers onto respective platforms (or susceptors) within a single reaction chamber despite dimensional changes in the relative positions of the platforms due to thermal expansion or contraction of the chamber with changes in temperature.
BACKGROUND OF THE INVENTION
Present day semiconductors have much higher densities than semiconductor of only a few years ago. This has necessitated new or improved processes and production equipment. Today's semiconductor circuits have features such as vias with diameters that are a small fraction of a micron, for example, only about 0.13 micron, with depths of 4 to 5 times the diameter. Such small via diameters and large depth to diameter ratios make it difficult with previously used materials (e.g., aluminum or copper) to properly metalize the vias completely down to their lower ends. Accordingly, a chemical vapor metalizing process using a highly volatile precursor compound of tungsten such as tungsten hexaflouride (WF
6
) is advantageously used to metalize the vias. In order to keep the tungsten being deposited on the exposed surface of the wafer from being deposited beyond and/or beneath the edge or rim of the wafer, inert gas, such as argon or argon mixed with helium, is flowed in an annular stream of the gas upward and over the rim. Flowing such a stream of inert gas, termed “edge-purging”, reduces or eliminates tungsten deposition adjacent the edge of the wafer by diluting or physically excluding the WF
6
precursor gas. For edge-purging to be fully effective, however, each wafer should be accurately centered on its respective platform.
In order to increase manufacturing throughput for a given capital investment, two wafer platforms are mounted in a single processing chamber. However, the exact positions of the centers of the platforms can vary because of manufacturing tolerances or because of thermal expansion or contraction of the chamber caused in turn by changes of temperature within the chamber. Because such changes of temperature can easily be a hundred or more degrees Centigrade, dimensional changes due to them can be relatively large. Unless these dimensional variations (however caused) changes are compensated for they can significantly affect the efficiency of edge-purging because of inaccurate centering of a wafer when placed on its respective platform. The present invention provides a simple and effective way of avoiding these difficulties.
SUMMARY OF THE INVENTION
In accordance with one aspect of the invention there is provided apparatus for processing of semiconductor wafers. The apparatus comprises a processing chamber; a first and a second wafer-holding platform; a plurality of wafer lifting pins associated with each platform, the pins being computer controlled to raise and lower them; a handling mechanism having a first and a second wafer-holding blade for inserting wafers into the chamber and for placing the wafers onto respective platforms, the handling mechanism being computer controlled to insert wafers into the chamber and to accurately place each wafer onto a respective platform; and a computer for controlling the wafer mechanism, the lift pins, and for determining when a wafer is accurately centered over a respective platform, the computer raising the lift pins of the first platform to raise a first wafer above its respective blade when the first wafer is accurately centered over the platform, then centering a second wafer over the second platform, raising the lift pins of the second platform to raise the second wafer above its respective blade, and thereafter withdrawing the blades from the chamber for subsequent processing of the wafers, such that each wafer is accurately centered on its respective platform in spite of thermal expansion and contraction of the chamber and changes in the exact positions of the platforms within the chamber.
In accordance with another aspect of the invention there is provided a method for accurately placing a first and a second semiconductor wafer onto respective platforms in a processing chamber which is subject to thermal expansion and contraction due to changes in temperature. The method comprises the steps of inserting the wafers into a processing chamber using a remotely controlled wafer-handling mechanism with a pair of wafer-supporting blades; centering the first wafer over its respective platform; lifting the first wafer off of the blade supporting it; centering the second wafer over its respective platform; lifting the second wafer off of the blade supporting it; withdrawing the blades from the chamber; and lowering the wafers onto their respective platforms.
REFERENCES:
patent: 4819167 (1989-04-01), Cheng et al.
patent: 5855681 (1999-01-01), Maydan et al.
patent: 6071055 (2000-06-01), Tepman
patent: 6155773 (2000-12-01), Ebbing et al.
patent: 6315512 (2001-11-01), Tabrizi et al.
Lei Lawrence Chung-Lai
Tepman Avi
Applied Materials Inc.
Ostroff & Associates
Tran Khoi H.
Valenza Joseph E.
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