Method and apparatus for accessing split lock variables in a com

Details Method and apparatus for accessing split lock variables in a com Method and apparatus for accessing split lock variables in a com

1996-12-11

1998-07-07

Swann, Tod R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

364DIG1, 3642434, 36424341, 3642384, 395487, 395458, 711118, 711150, 711151, 711145, G06F 1200, G06F 1300

Patent

active

057784418

ABSTRACT:
Atomicity of lock variables is preserved in a computer system in response to a request by a microprocessor for a bus lock access whether the lock variable is split between two cache lines or is within a single cache line. A non-split lock bus access which can be satisfied by a cacheable region within the same cluster as the microprocessor issuing the access is allowed to complete, regardless of whether ownership of the next level bus is available. If the non-split lock access can not be satisfied within the cluster, then ownership of the next level bus is obtained, if available, to satisfy the access. Similarly, a split lock access may complete if ownership of the second level bus can be obtained. However, a split lock access is aborted if the second level bus ownership is not available, regardless of whether a cacheable region within the same cluster can satisfy the request.

REFERENCES:
patent: 5237694 (1993-08-01), Horne et al.
patent: 5283870 (1994-02-01), Joyce et al.
patent: 5353414 (1994-10-01), Iida et al.
patent: 5353415 (1994-10-01), Wolford et al.
patent: 5404482 (1995-04-01), Stamm et al.
patent: 5467295 (1995-11-01), Young et al.

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