Method and apparatus for accessing a memory

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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C711S153000

Reexamination Certificate

active

07617376

ABSTRACT:
The disclosed embodiments relate to an optimized memory registration mechanism that may comprise an upper layer protocol that associates I/O buffers with memory regions and that manages steering tags. The memory regions may be associated with a translation page table. The upper layer protocol may allocate one of the steering tags associated with at least one of the memory regions for a memory operation.

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