Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2000-12-19
2004-07-20
Phu, Phoung (Department: 2631)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S373000, C375S355000, C370S517000, C327S161000
Reexamination Certificate
active
06765975
ABSTRACT:
BACKGROUND INFORMATION
Two basic receiver architectures are prevalent in the industry today; tracking and over-sampling. In summary, tracking receivers use a PLL (phase locked loop) structure or functionally equivalent structure such as an application of a DLL (delay locked loop) that compares the phase of received data with a local clock's phase and adjusts the local clock's phase to match the received data's phase. In addition, the structure modulates the frequency of the local clock to match the rate of the incoming data. (See G. C. Hsieh, J. C. Hung,
Phase
-
Locked Loop Techniques—A Survey
, IEEE Trans. on Industrial Electronics, Vol. IE-43, No.6, 609-615, December 1996.) It tracks and synchronizes itself to the received data so that it can sample the data with appropriate timing to reliably receive it. Tracking the rate of received data enables the structure to sample the data with consistent timing for each bit received. By tracking the rate and phase of the data, the receiver can tolerate phase and amplitude jitter that may be present in the received waveform due to various noise sources.
An over-sampling receiver avoids the use of a PLL structure by taking many samples of the received data and looking at the history of those samples to filter out noise in the data. The structure analyzes the history of past samples and utilizes one of various algorithms to determine which samples are providing a correct representation of received data and which are erroneous and/or redundant.
Tracking receivers typically perform only a single sample per bit to recover the data. There is the potential for error occurring due to the fact that the sample is taken at the same point in the bit period each time. Deterministic jitter, as explained below, can cause the waveform of the received data to change and shift within the bit period. This can cause a PLL structure to potentially sample the data too early or too late within the bit period because the bit may not have fully formed or because the transition to the next bit has already begun at that sample time. This would cause the sampler to provide an erroneous result.
In general, over-sampling receivers contain a much higher percentage of digital circuitry, which should be more tolerant of noise sources. However, the rate at which they sample the incoming waveform has to be increased with increasing jitter in the channel. Also, the over-sampling receiver needs to handle the frequency difference between the transmit and receive clocks.
There are primarily two types of noise (jitter) that the receivers must deal with: random and deterministic. Random jitter is produced by various sources. The effect each individual noise source has is not predictable, and the accumulation of the unpredictable noises is the random jitter. The accumulation has a symmetrical distribution centered around where the expected signal should be located. Because the average (accumulation over time) of these sources is the correct point in time, it is not difficult to compensate for.
Deterministic jitter is a main concern of the present invention. This type of noise is caused primarily by the interaction of capacitive, inductive, and resistive effects of the media upon which the data travels. Deterministic jitter does not have a symmetrical effect on the signal. It can cause the waveform to distort and shift in time (determined by the pattern of signal sent down the media channel). This creates the possibility of receivers utilizing over-sampling and tracking methods to acquire erroneous interpretations of the received data. When utilizing tracking methods, the sampling of the signal may be taken too early or too late. The distortion and shifting of the waveform could cause the sampler to read the data before or after it has reached the correct level or started its transition to the next level. Similarly, over-sampling methods could misinterpret received data because of the shift in time that the deterministic jitter causes on the waveform of the data. The effects of deterministic jitter on the received data can be predicted algorithmically with usage of the history of previously received data.
Because of the foregoing problems with sampling receivers in the art, there is a need for a sampling data receiver that is not susceptible to the various problems that occur in tracking and over-sampling receivers.
REFERENCES:
patent: 5022056 (1991-06-01), Henderson et al.
patent: 5488639 (1996-01-01), MacWilliams et al.
patent: 5687203 (1997-11-01), Baba
patent: 5761254 (1998-06-01), Behrin
patent: 5818890 (1998-10-01), Ford et al.
patent: 5822386 (1998-10-01), Pawelski
patent: 5887040 (1999-03-01), Jung et al.
patent: 6236696 (2001-05-01), Aoki et al.
patent: 6373911 (2002-04-01), Tajima et al.
Abhayagunawardhana Chamath
Drottar Ken
Dunning David S.
Jensen Richard S.
Kenyon & Kenyon
Phu Phoung
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