Electrical computers and digital processing systems: memory – Address formation – Generating prefetch – look-ahead – jump – or predictive address
Reexamination Certificate
2006-10-17
2006-10-17
Elmore, Reba I. (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
Generating prefetch, look-ahead, jump, or predictive address
C711S221000
Reexamination Certificate
active
07124277
ABSTRACT:
A method and apparatus for a trace end predictor for a trace cache is disclosed. In one embodiment, the trace end predictor may have one or more buffers to contain a head address for a subsequent trace. The head address may include the way number and set number of the next head, along with partial stew data to support additional execution predictors. The buffers may also include tag data of the current trace's tail address, and may additionally include control bits for determining whether to replace the buffer's contents with information from another trace's tail. Reading the next head address from the trace end predictor, as opposed to reading it from the trace cache array, may reduce certain execution time delays.
REFERENCES:
patent: 6018786 (2000-01-01), Krick et al.
patent: 6216206 (2001-04-01), Peled et al.
Cooray Niranjan L.
Maiyuran Subramaniam
Nisar Asim
Smith Peter J.
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