Static information storage and retrieval – Read/write circuit – Simultaneous operations
Patent
1994-04-07
1996-08-13
Swann, Tod R.
Static information storage and retrieval
Read/write circuit
Simultaneous operations
36518902, 36518912, 36523002, 36523003, 364DIG1, 395800, G11C 1500, G11C 1900
Patent
active
055463436
ABSTRACT:
A random access memory chip is comprised of static random access storage elements, word lines, and bit lines connected to the storage elements, a sense amplifier connected to each of the bit lines, a separate processor element connected to each of the sense amplifiers, apparatus for addressing a word line, and apparatus for applying a single instruction to the processor elements, whereby the instructed processor elements are enabled to carry out a processing instruction in parallel on separate bits stored in the storage elements of the addressed word line. A method of operating a digital computer is comprised of in one operation cycle, addressing a memory, reading each of a row of data from the memory in parallel, and performing a same operation function on each bit of the data in parallel to provide a result.
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patent: 4945469 (1990-07-01), Yamada
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patent: 5040152 (1991-09-01), Voss et al.
patent: 5148401 (1992-09-01), Sekino et al.
patent: 5165023 (1992-11-01), Gifford
Elliott Duncan G.
Snelgrove W. Martin
Peikari James
Swann Tod R.
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