Method and apparatus for a low-level console

Details Method and apparatus for a low-level console Method and apparatus for a low-level console

2008-07-15

2008-07-15

Baderman, Scott (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C709S209000

Reexamination Certificate

active

07401262

ABSTRACT:
A method, apparatus and computer instructions for interfacing with an operating system on a data processing system. Registers in a processor are allocated for use in providing a low-level console interface to a remote data processing system, wherein the registers are accessed by the remote data processing system using the low-level console interface. Data is exchanged with the remote data processing system through the low-level console interface. Also, multiple channels may be multiplexed through this low-level console interface.

REFERENCES:
patent: 6484273 (2002-11-01), Chang
patent: 2003/0046610 (2003-03-01), Yamamoto et al.
patent: 2003/0126320 (2003-07-01), Liu et al.
“IEEE Standard Test Access Port and Boundary-Scan Architecture”, IEEE Std 1149.1-2001, published 2001, p. 1, 33-36.
Whetsel, L. “A Proposed Standard Test Bus and Boundary Scan Architecture”, published Oct. 3-5, 1988.
Huang, et al. “A Retargetable Embedded In-Circuit Emulation Module for Microprocessors”, published Jul./Aug. 2002.

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