Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Patent
1996-07-01
1999-02-16
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
39520042, 39520046, G06F 1314
Patent
active
058731172
ABSTRACT:
A method in a computer network having a first plurality of nodes coupled to a common network infrastructure and a distributed shared memory distributed among the first plurality of nodes for servicing a first memory access request by a first node of the computer network pertaining to a memory block having a home node different from the first node in the computer network. The computer network has no natural ordering mechanism and natural broadcast for servicing memory access requests from the plurality of nodes. The home node has no centralized directory for tracking states of the memory block in the plurality of nodes. The method includes the step of receiving via the common network infrastructure at the home node from the first node the first memory access request for the memory block. There is also included the step of sending, if the home node does not have a first valid copy of the memory block, a request from the home node to a second plurality of nodes in the computer network to request a second node in the computer network to send the first valid copy of the memory block to the first node. The second plurality of nodes represents the first plurality of nodes excepting the first node and the home node. The first valid copy of the memory block represents a valid copy that is capable of servicing the first memory access request.
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Hagersten Erik E.
Hill Mark Donald
Rockett Esteban A.
Sun Microsystems Inc.
Swann Tod R.
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