Method and apparatus for a configurable latch

Details Method and apparatus for a configurable latch Method and apparatus for a configurable latch

2007-08-07

2007-08-07

Chang, Daniel (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Sequential or with flip-flop

C327S166000, C327S219000

Reexamination Certificate

active

11145135

ABSTRACT:
A configurable latch is implemented using a configurable pulse generator and a level sensitive (LS) latch. The configurable pulse generator produces either a pulse signal that is aligned with the input clock edge, or simply provides the input clock signal to its output in response to a pulse generator control signal. If a pulse signal is provided to the latch, then edge triggered (ET) latch operation is effected within the latch. If, on the other hand, a clock signal is provided to the latch, then LS latch operation is effected within the latch. Thus, configuration of latch operation is established in response to the type of clock signal that is provided to the latch.

REFERENCES:
patent: 7088136 (2006-08-01), Lewis
Horenstein, “Microelectronic circuits and devices”, 1990, Prentice-Hall, Inc., p. 754.

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