Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
1998-10-06
2001-03-06
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S730000, C257S685000
Reexamination Certificate
active
06198162
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to the field of semiconductor manufacture, and more specifically to a method and apparatus for forming a particular arrangement of a printed circuit board and a semiconductor die.
BACKGROUND OF THE INVENTION
Many types of semiconductor die such as dynamic random access memories (D)RAMs), static rams (SRAMs), programmable memories, logic devices, and microprocessors are tested and packaged in a similar manner. After a plurality of semiconductor die are manufactured from a wafer of semiconductor material, a cursory test for functionality is performed on each die. The die are singularized, and those die which passed the cursory test are encapsulated in plastic or encased in a ceramic package. Encapsulated packages comprise bond wires which electrically couple bond pads on the die to a lead frame. The lead frame functions, in part, to transfer an electric signal between the die and a printed circuit board (PCB) to which leads of the lead frame are soldered.
After packaging, the die and package connections are rigorously tested using strict electrical parameters under various environmental conditions. Those which fail testing are scrapped.
The packaging of a semiconductor die has various problems associated therewith. For example the packaging increases the size of the semiconductor device which adds to space problems which are well known in the art of computer and other electronic device manufacturing. Further, packaging can contribute to overheating of the die which can cause the packaged die to malfunction. Connections of the bond wire to the die and to the lead frame, and the solder connections of the leads to the PCB, are also common causes of device failure.
A semiconductor device which has fewer of the problems associated with conventional device packaging would be desirable.
SUMMARY OF THE INVENTION
One embodiment of an inventive semiconductor apparatus comprises a printed circuit board having at least one pad to receive a bond wire, and further having at least one hole therethrough. A circuit side of a semiconductor device having bond pads on the circuit side on the circuit side is attached to the printed circuit board. This embodiment of the inventive apparatus further comprises at least one bond wire having first and second ends, wherein the first end is attached to one of the bond pads and the second end is attached to the printed circuit board pad.
Various objects and advantages will become apparent to those skilled in the art from the following detailed description read in conjunction with the appended claims and the drawings attached hereto.
REFERENCES:
patent: 4598308 (1986-07-01), James et al.
patent: 5107328 (1992-04-01), Kinsman
patent: 5240588 (1993-08-01), Uchida
patent: 5243497 (1993-09-01), Chiu
patent: 5313096 (1994-05-01), Eide
patent: 5384689 (1995-01-01), Shen
patent: 5502289 (1996-03-01), Takiar et al.
patent: 5818698 (1998-10-01), Corisis
patent: 5936305 (1999-08-01), Akram
patent: 5998860 (1999-12-01), Chan et al.
patent: 6013948 (2000-01-01), Akram et al.
Clark Sheila V.
Micro)n Technology, Inc.
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