Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2006-06-20
2006-06-20
Baderman, Scott (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S053000, C714S038110, C717S126000
Reexamination Certificate
active
07065680
ABSTRACT:
A method and associated system and electronic device for evaluating the reliability of a program (401) stored in a storage memory of an electronic device (1) having a processing memory (3b) for processing programs, wherein the program (401) is loaded into the processing memory (3b) for processing, wherein a first determining step determines data about the loading address of the program (401), a modification step searches for a program corresponding to the program (401) in the storage memory (4, 10), wherein if the searched program is found, the program code of the searched program is modified to correspond to the loading of the program in the loading address determined in the first determining step. An examining step examines the conformity of the program loaded in the processing memory and the modified program, wherein the result of the examining step is used in the evaluation of the reliability of the program (401) to be verified.
REFERENCES:
patent: 5493649 (1996-02-01), Slivka et al.
patent: 5822517 (1998-10-01), Dotan
patent: 5944821 (1999-08-01), Angelo
patent: 6021510 (2000-02-01), Nachenberg
patent: 2001/0027524 (2001-10-01), Krauter et al.
Baderman Scott
Fressola Alfred A.
Nokia Corporation
Schell Joseph
Ware Fressola Van Der Sluys & Adolphson LLP
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