Method an apparatus for tolerance of lost timer ticks during rec

Details Method an apparatus for tolerance of lost timer ticks during rec Method an apparatus for tolerance of lost timer ticks during rec

1997-01-28

1999-04-06

Lim, Krisna

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

714 10, G06F 1100

Patent

active

058928952

ABSTRACT:
A method and apparatus for detecting and tolerating situations in which one or more processors in a multi-processor system cannot participate in timer-driven or timer-triggered protocols or event sequences. The multi-processor system includes multiple processors each having a respective memory. These processors are coupled by an inter-processor communication network (preferably consisting of redundant paths).
Processors are suspected of having failed (ceased operations) outright or having a failed timer mechanism when other processors detect the absence of periodic "IamAlive" messages from other processors. When this happens, all of the processors in the system are subjected to a series of stages in which they repeatedly broadcast their status and their connectivity to each other. During the first such stage, according to the present invention, a processor will not assert its ability to participate unless its timer mechanism is working. It arms a timer expiration event and does not assert its health until and unless that timer expiration event occurs.

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Flaviu Cristian et al.; Automatic Service Availability Management in Asynchronous Distributed Systems; Configurable Distributed system, 1994 Int'l Workshop; pp. 58-68, Jun. 1994.
Flaviu Cristian et al.; Autonomous Decentralized Systems, 1993 Int'l Symp.; pp. 360-366, Feb. 1993.
Copy of International Search Report for PCT/US98/01484 dated Aug. 4, 1998.

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