Metastableproof flip-flop

Details Metastableproof flip-flop Metastableproof flip-flop

1996-11-19

1998-05-19

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

327202, 327213, 327142, 326 94, H03K 3356

Patent

active

057540705

ABSTRACT:
A metastableproof flip-flop receives an input value on a flip-flop input. The flip-flop holds an output value on a flip-flop output. In response to a transition of a clock signal, a transition in the output value occurs. The new output value is the input value formerly received by the flip-flop. In order to make the flip-flop metastableproof, the transition in the output value is delayed when the input value is in a metastable state. When the input value is no longer in the metastable state, then the transition in the output value is allowed to complete.

REFERENCES:
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patent: 4963772 (1990-10-01), Dike
patent: 5001371 (1991-03-01), Mahabadi
patent: 5014226 (1991-05-01), Horstmann et al.
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patent: 5440569 (1995-08-01), Naito
patent: 5463338 (1995-10-01), Yurash
patent: 5485112 (1996-01-01), Greenberg et al.
IBM Technical Disclosure Bulletin, "Metastability Reduction in High-Speed Analog-to-Digital Converters by Alternating Latches", vol. 38, No. 7, Jul. 1995.

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