Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1998-03-27
2002-06-11
Cuneo, Kamand (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S255000, C174S261000
Reexamination Certificate
active
06403891
ABSTRACT:
BACKGROUND OF THE INVENTION
1. FIELD OF THE INVENTION
The present invention relates to a process and structure for forming identification indicia within an ink block of a printed circuit board.
2. BACKGROUND INFORMATION
Integrated circuits are typically assembled within packages that are mounted to a printed circuit board. The printed circuit board may be coupled to a motherboard of a computer system. When manufacturing printed circuit board assemblies it is desirable to provide indicia which identifies the product.
There has been developed a technique for forming an identification matrix in an ink block that is screened onto the top layer of a printed circuit board. The identification matrix is typically scanned by an optical reader to identify the part. The matrix may be formed by removing material from the ink block with laser energy. It has been found that some of the laser energy is transferred into the underlying substrate of the printed circuit board. The circuit board may have internal conductive layers which absorb the heat. The heat may create a delamination of the board. It has been found that a delaminated board or exposed layers on the board creates poor reflectivity on the surface of the board. The poor reflectivity can result in an improper reading of the identification matrix by the optical scanner. It would therefore be desirable to provide a circuit board that does not have a significant reduction in reflectivity when an identification matrix is formed in an ink block with a laser ablation process.
SUMMARY OF THE INVENTION
One embodiment of the present invention is a printed circuit board which has an ink block located adjacent to a first conductive layer. The first conductive layer has a first non-metallized area located beneath the ink block.
REFERENCES:
patent: 5093183 (1992-03-01), Strunka
patent: 5214571 (1993-05-01), Dahlgren et al.
patent: 5296649 (1994-03-01), Kosuga et al.
patent: 5491302 (1996-02-01), Distefano et al.
patent: 5768107 (1998-06-01), Ouchi et al.
Banerjee Koushik
Randleman Craig
Blakely , Sokoloff, Taylor & Zafman LLP
Cuneo Kamand
Intel Corporation
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