Metallization arrangement for semiconductor structure and...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S623000, C438S624000

Reexamination Certificate

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06908844

ABSTRACT:
The present invention provides a metallization arrangement for a semiconductor structure (1) having a first substructure plane (M1), preferably a first metallization plane; a second metallization plane (M2) having a first and a second adjacent interconnect (LBA; LBB); a first intermediate dielectric (ILD1) for mutual electrical insulation of the first substructure plane (M1) and second metallization plane (M2); and via holes (V) filled with a conductive material (FM) in the intermediate dielectric (ILD1) for connecting the first substructure plane (M1) and second metallization plane (M2). A liner layer (L) made of a dielectric material is provided under the second metallization plane (M2), which liner layer is interrupted in the interspace (O) between the first and second adjacent interconnects (LBA; LBB) of the second metallization plane (M2). The invention likewise provides a corresponding fabrication method.

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