Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Utility Patent
1998-02-18
2001-01-02
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S401000, C257S344000
Utility Patent
active
06169315
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a field effect transistor, and more particularly, to an improved metal oxide semiconductor field effect transistor (hereinafter, called “MOSFET”).
BACKGROUND ART
FIGS. 1A through 1F
are views showing a fabrication method for a MOSFET having a conventional reverse-T type gate. As shown in
FIG. 1A
, a gate insulation film
2
and a conductive film
3
, such as a multi-crystalline silicon film, are consecutively deposited on a p-type silicon substrate
1
, and an oxidation film
4
is deposited thereon. By a lithographic etching, a photo resist film (not shown) formed on the oxidation film
4
is etched into a photo resist film pattern
5
which serves as a mask for etching the oxidation film
4
.
Then, as shown in
FIG. 1B
, the photo resist film pattern
5
is removed, and the conductive film
3
is etched down to a predetermined depth thereof by using the oxidation film
4
as a mask. By using the remaining oxidation film
4
as a mask, the conductive film
3
is etched so that the conductive film portion beneath the oxidation film
4
can be relatively thicker than the other conductive film portion left behind after the etching.
By using the patterned oxidation film
4
as a mask, low density n-type impurities, such as phosphorus, are ion-implanted into the conductive film
3
, as shown in FIG.
1
C. As a result, regions
6
of a lightly doped drain (hereinafter, called “LDD”) are formed in the p-type substrate
1
by means of a self-alignment. As shown in
FIG. 1D
, the patterned oxidation film
4
is removed, and an oxidation film is deposited on the conductive film
3
. By etching-back the oxidation film, side wall spacers
7
are formed which cover the laterally extended portions of the conductive film
3
.
By using the side wall spacers
7
as a mask, as shown in
FIG. 1E
, the conductive film
3
is etched to expose a predetermined portion of the gate insulation film
2
. As shown in
FIG. 1F
, the side wall spacers
7
and the conductive film
3
therebeneath are used as a mask, and high density n-type impurities are ion-implanted through the externally exposed portion of the gate insulation film
2
to form an n+ source-drain regions
8
in the n-LDD regions
6
, whereby fabrication of the MOSFET having the reverse-T type gate electrode is completed.
When a MOSFET is manufactured in accordance with the previously described fabrication steps, there are several disadvantages. The control of the etching amount remains difficult when etching the conductive film
3
down to a predetermined depth thereof using the oxidation film
4
as a mask. Since the n-LDD region doping density is lower than the channel region density when line width becomes sub-micron, the channel region may influence the n-LDD region.
In addition, the above-described conventional MOSFET fabrication process is difficult to apply a short channel with demanding design rule, because the channel length is confined by the available lithographic technology. A large overlap region between a gate electrode film and a drain region results in a large capacitance between the gate electrode film and the drain region.
DISCLOSURE OF THE INVENTION
The present invention is achieved at least in part by a semiconductor device comprising: a substrate; a channel region formed in the substrate; a gate insulation layer formed on the channel region; a gate formed on the gate insulation layer; and source and drain regions formed on opposite sides of the gate, wherein the gate includes a first conductive layer and a second conductive layer formed on the first conductive layer, and the second conductive layer having curved sidewalls with an insulating layer formed adjacent to the sidewalls.
The present invention is also achieved in part by a method of making a semiconductor device, comprising the steps of: forming a first insulative film on a substrate; removing a predetermined portion of the first insulative film to expose an area of the substrate; forming a channel region in the exposed area of the substrate; forming a gate within the predetermined portion of the first insulative film which has been removed; removing the first insulative film; and forming source and drain regions adjacent to the gate.
The MOSFET fabrication method in accordance with the present invention includes forming a disposable film on a substrate but exposing a predetermined surface portion of the substrate therethrough, forming a gate insulation film on the externally exposed surface of the substrate, forming a first conductive film on the disposable film and the gate insulation film, forming side wall spacers on the side walls of the first conductive film and on each side surface portion of the first conductive film beneath which the gate insulation film is formed, forming a second conductive film on the first conductive film so as to have the space between the side wall spacers entirely filled and, etching-back the second conductive film, removing the side wall spacers and forming a low density ion-implanted region in the substrate by ion-implanting impurities, forming an insulation film on the first and second conductive films having the same height as the disposable film, removing the disposable film, and forming source-drain regions in the substrate by ion-implanting impurities through the substrate surface from which the disposable film was removed.
Additional advantages, objects and other features of the invention will be set forth in part in the description which follows and in part will become apparent t o those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
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Huang, T., et al., “A Novel Submicron LDD Transistor With Inverse-T Gate Structure,” IEDM 86, pp. 742-745.
Fleshner & Kim LLP
Hyundai Electronics Industries Co,. Ltd.
Nadav Ori
Thomas Tom
LandOfFree
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