Metal-line structure in integrated circuit and method of fabrica

Details Metal-line structure in integrated circuit and method of fabrica Metal-line structure in integrated circuit and method of fabrica

1998-10-01

2000-10-03

Bowers, Charles

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438596, 438652, 438653, 438591, 438636, H01L 214763

Patent

active

061272523

ABSTRACT:
A metal-line structure in an integrated circuit (IC) and a method of fabricating the same are provided. The metal-line structure includes a barrier layer formed at a selected location over the dielectric layer, a metallization layer formed over the barrier layer, an ARC formed over the metallization layer, and a spacer structure formed over all the exposed sidewalls of the barrier layer, the metallization layer, and the ARC. The forming of the spacer structure on each of the metal lines can help prevent the occurrence of extrusions along the sidewalls of the metal lines in the IC device that would otherwise cause dielectric cracks and thus lead to undesired bridging between neighboring metal lines as in the prior art. Moreover, the method of fabricating such a metal-line structure can be carried out without having to perform photolithography, thus reducing manufacturing cost.

REFERENCES:
patent: 5854503 (1998-12-01), Hsueh et al.

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