Metal layer interconnects with improved performance characterist

Details Metal layer interconnects with improved performance characterist Metal layer interconnects with improved performance characterist

1997-12-18

2000-10-17

Clark, Sheila V.

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

257700, 257758, H01L 2304

Patent

active

061336289

ABSTRACT:
Two patterned metal layers are interconnected by forming a through-hole in one or more insulating layers, employing an etch process minimizing the formation of polymeric residue, thereby maintaining an appropriate etch rate to penetrate the insulating material. A variety of fluorocarbon gas chemistries may be used, such as CF.sub.4, CH.sub.3, CHF.sub.3 and NF.sub.3. The through-hole is then filled with a conductive material, such as tungsten, to form a conductive via.

REFERENCES:
patent: 4367119 (1983-01-01), Logan et al.
patent: 5309024 (1994-05-01), Hirano
patent: 5710462 (1998-01-01), Mizushima
patent: 5721453 (1998-02-01), Imai et al.
patent: 5786630 (1998-07-01), Bhansali et al.
patent: 5874779 (1999-02-01), Matsuno

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