Metal junction method of manufacture for semiconductor devices

Details Metal junction method of manufacture for semiconductor devices Metal junction method of manufacture for semiconductor devices

1994-08-02

1996-10-08

Fourson, George

Fishing, trapping, and vermin destroying

437194, 437195, 1566281, H01L 2128

Patent

active

055630995

ABSTRACT:
Via reliability failure in ULSI devices having aluminum leads is significantly reduced by forming a thin layer of metal, such as Ti, between the aluminum conductor and its antireflection coating. Heating the metal causes it to react with the aluminum and form an intermetallic coating. Via hole formation is achieved by etching. During via formation, if the etch etchs through the antireflection coating, it should stop in the intermetallic layer as opposed to etching into the underlying aluminum conductor. The thin layer of metal may be heated to form the intermetallic during planarization when curing spin on glass, or, a separate anneal may be used with planarization such as by chemical mechanical polish.

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