Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2007-08-14
2007-08-14
Smith, Zandra V. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S773000, C257S751000, C257S787000, C257S760000, C438S624000, C438S627000, C438S634000, C438S637000, C438S638000, C438S639000, C438S700000
Reexamination Certificate
active
10901877
ABSTRACT:
A metal interconnection for an integrated circuit device is fabricated by forming a trench in an integrated circuit substrate and a via hole beneath a portion of the trench. The trench includes a trench sidewall and the via hole includes a sacrificial film therein. A buffer layer is formed on the trench sidewall. At least some of the sacrificial film is removed from the via hole by etching the sacrificial film through the trench that includes the buffer layer on the trench sidewall. The metal interconnection is formed in the via hole from which at least some of the sacrificial film has been removed, and in the trench. The buffer layer may use material having etch selectivity to an etchant which is used when removing the sacrificial film, to thereby protect the trench sidewall when removing the sacrificial film.
REFERENCES:
patent: 6297149 (2001-10-01), Stamper
patent: 6559546 (2003-05-01), Achuthan et al.
patent: 6686662 (2004-02-01), Merchant et al.
patent: 2002/0177301 (2002-11-01), Biolsi et al.
Chiu Tsz
Myers Bigel & Sibley Sajovec, PA
Samsung Electronics Co,. Ltd.
Smith Zandra V.
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