Metal fuse structure for saving layout area

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections

Reexamination Certificate

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C257S529000, C257S665000, C438S132000, C438S467000, C438S601000

Reexamination Certificate

active

06867441

ABSTRACT:
A fuse structure for a semiconductor device on a substrate includes a fuse having an electrically conductive fuse line of a standard fuse length formed in an electrically conductive layer disposed over the substrate, and a pair of electrically conductive, inwardly bent interconnects formed in a first plurality of electrically conductive layers disposed over the substrate, below the electrically conductive layer in which the fuse line is formed. The inwardly bent interconnects couple the fuse line to a circuit area of the substrate disposed under the fuse line. The fuse structure may further include a protective guard ring formed around the fuse. The guard ring includes a second plurality of electrically conductive interconnects.

REFERENCES:
patent: 5970346 (1999-10-01), Liaw
patent: 6100118 (2000-08-01), Shih et al.
patent: 6444544 (2002-09-01), Hu et al.

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