Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2007-07-24
2007-07-24
Williams, Alexander Oscar (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257SE27104, C257SE21577, C257SE21279, C257SE21276, C257SE21584, C257SE21579, C257S701000, C257S775000, C257S774000, C257S776000, C257S737000, C257S758000, C257S750000, C257S310000, C174S263000
Reexamination Certificate
active
10405593
ABSTRACT:
A method for forming a metal filled semiconductor feature with improved structural stability including a semiconductor wafer having an anisotropically etched opening formed through a plurality of dielectric insulating layers revealing a first etching resistant layer overlying a conductive area; a plurality of dielectric insulating layers sequentially stacked to have alternating etching rates to a preferential etching process; subjecting the anisotropically etched opening to the preferential etching process whereby the sidewalls of the anisotropically etched opening are preferentially etched to produce etched dielectric insulating layers to form roughened sidewall surfaces; anisotropically etching through the etching resistant layer to reveal the conductive area; and, filling the anisotropically etched opening with a metal to form a metal filled semiconductor feature.
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Chen Chao-Chen
Huang Yi-Chen
Taiwan Semiconductor Manufacturing Co. Ltd.
Tung & Associates
Williams Alexander Oscar
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