Metal adhesion by induced surface roughness

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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C438S114000, C438S462000, C438S667000, C257SE21239

Reexamination Certificate

active

08039314

ABSTRACT:
Back side metal (BSM) delamination induced by chip dicing of silicon wafers is avoided by roughening the polished silicon surface at chip edges by etching. The Thru-Silicon-Via (TSV) structures used in 3D chip integration is masked at the back side from roughening to maintain the polished surface at the TSV structures and, thus, reliable conductivity to the BSM layer.

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