Message based interrupt table

Electrical computers and digital data processing systems: input/ – Interrupt processing – Programmable interrupt processing

Reexamination Certificate

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C710S268000, C710S269000

Reexamination Certificate

active

11011511

ABSTRACT:
An interrupt processing technique is provided where an interrupt message is sent to an interrupt controller of a processor in response to an interrupt request from an individual device. The interrupt message comprises a memory address and interrupt status information. The memory address is specifically allocated to the device that has issued the interrupt request. The interrupt status information indicates an interrupt status of the device. An interrupt table that is stored in the memory is updated by the interrupt controller using the interrupt status information comprised in the interrupt message. The interrupt table holds device specific interrupt statuses. Updating the interrupt table comprises addressing the memory using the memory address in the interrupt message.

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PCI Local Bus Specification, Revision 2.2, section 6.8: Message Signaled Interrupts, pp. 214-220, Dec. 18, 1998.
Definition of Southbridge from Wikipedia, undated.
Office Action application number German application no. 10 2004 042 170.6-53 mailed Jun. 22, 2006.

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