MESFET sram with power saving current-limiting transistors

Static information storage and retrieval – Systems using particular element – Flip-flop

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Details

365227, 365182, 365190, 307446, G11C 1140, G11C 700

Patent

active

049012797

ABSTRACT:
A static random access memory cell implemented with metal Schottky field-effect transistors. The cell has first and second branches, each of the branches including: a depletion mode current limiting transistor having a drain connected to a first circuit node; a depletion mode load transistor having a drain connected to the source of the current limiting transistor and a source connected to a second circuit node; an enhancement mode active transistor having a drain connected to the second circuit node and a source connected to a third circuit node; an enhancement mode access transistor having a source connected to the second circuit node and a gate connected to the gate of the current limiting transistor; the gate of the load transistor connected to the second circuit node; the commonly connected gates of the current limiting transistor and the access transistor adapted to receive a word-line signal; and the drain of the access transistor adapted to receive a bit-line signal. The first circuit node is adapted for connection to a source of bias voltage, and the third circuit node is adapted for connection to a circuit ground. The first and second branches are cross-connected between the second nodes and the gates of the active transistors.

REFERENCES:
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patent: 4375677 (1983-03-01), Schuermeyer
patent: 4450462 (1984-05-01), Nuyen
patent: 4458338 (1984-07-01), Giebel et al.
patent: 4460978 (1984-07-01), Jiang et al.
patent: 4503522 (1985-03-01), Kawajiri et al.
patent: 4507758 (1985-03-01), Moeschwitzer
patent: 4520462 (1985-05-01), Yamada et al.
patent: 4567577 (1986-01-01), Oliver
patent: 4577215 (1986-03-01), Stewart
patent: 4578778 (1986-03-01), Aoyama

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