Mesa isolation Refill Process for Silicon on Insulator Technolog

Details Mesa isolation Refill Process for Silicon on Insulator Technolog Mesa isolation Refill Process for Silicon on Insulator Technolog

1997-07-29

1999-03-16

Bowers, Jr., Charles

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Total dielectric isolation

438412, 438151, 438163, 148DIG44, 257347, H01L 21225, H01L 21316, H01L 21265

Patent

active

058829814

ABSTRACT:
After formation of a sandwich over a substrate of a layer of silicon dioxide (3) followed by a layer of silicon (1) having a pad oxide (7) thereon and a patterned silicon nitride layer (9) over the pad oxide, the unmasked portion of the pad oxide and silicon are removed to provide mesas of silicon with silicon nitride thereover and possibly removal of some of the buried oxide layer. A flowable insulator (15), preferably silsesquioxane (H.sub.x SiO.sub.1.5, where x.ltoreq.1, depending upon the level of polymerization) in a contaminant-free, high purity solvent which is later removed during an annealing step, is placed over the exposed surface such that it fills the voids between the mesas of silicon with silicon nitride thereon and extends over the nitride. The flowable insulator, due to its flowability, provides a generally planar surface. The flowable insulator is etched back and a cap oxide (17) is optionally deposited over the etched back insulator layer. The cap oxide layer (if used), some insulator and nitride are then etched away, leaving the pad oxide over the silicon. The processing is then completed by removing the pad oxide, growing a gate oxide and then forming the gate and source drain electrodes and/or other processing techniques that may be required to provide the final device.

REFERENCES:
patent: 5028564 (1991-07-01), Chang et al.
patent: 5429990 (1995-07-01), Liu et al.
patent: 5482871 (1996-01-01), Pollack

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