Merged logic element routing multiplexer

Details Merged logic element routing multiplexer Merged logic element routing multiplexer

2007-05-08

2007-05-08

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S047000

Reexamination Certificate

active

11021842

ABSTRACT:
A merged logic element routing multiplexer circuit includes one or more inputs coupled to the logic element (LE) output, one or more tri-stated circuits coupled to the corresponding one or more inputs, wherein the tri-stated circuits are controlled by a set of programmable select signals, and an output port coupled to the inter logic array block (LAB) routing wire, where the output port is connected to outputs of the tri-stated circuits through a buffer circuit.

REFERENCES:
patent: 5883525 (1999-03-01), Tavana et al.
patent: 6335634 (2002-01-01), Reddy et al.
patent: 6621298 (2003-09-01), Agrawal et al.
patent: 6630842 (2003-10-01), Lewis et al.
patent: 6826741 (2004-11-01), Johnson et al.

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