Memory write protection circuit

Details Memory write protection circuit Memory write protection circuit

1989-09-26

1992-06-02

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read/write circuit

Signals

365228, 3642468, 3649692, G11C 700

Patent

active

051193361

ABSTRACT:
A memory has a plurality of areas, anyone of which may be assigned a status from a central control unit as to whether it is writable or non-writable and as to whether it is or is not write protected. When an order to write is received, a deciding circuit indicates the status assigned to the pertinent memory area. A certain period of time is measured during which write protection may be canceled if a predetermined procedure is followed. Then the deciding circuit gives or denies writing access according to the assigned status and to whether a proper protection cancellation procedure has been followed.

REFERENCES:
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patent: 4589092 (1986-05-01), Mattick
patent: 4636986 (1987-01-01), Pinkham
patent: 4744062 (1988-05-01), Nakamura et al.
patent: 4811299 (1989-03-01), Miyazawa et al.
patent: 4813024 (1989-03-01), Lisimaque et al.
patent: 4831597 (1989-05-01), Fuse
patent: 4926388 (1990-05-01), Kunita et al.
patent: 4931993 (1990-06-01), Urushima

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