Memory with redundant rows and columns

Details Memory with redundant rows and columns Memory with redundant rows and columns

1979-02-09

1980-10-14

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Bad bit

307238, 365210, G11C 1300

Patent

active

042285283

ABSTRACT:
A memory is provided with standard rows and columns and spare rows and columns for substitution for standard rows and columns found to have defective cells. Each of the decoders associated with a standard row and/or column includes provision for being disconnected if found to be associated with a defective row or column. Each of the decoders associated with a spare row and/or column is designed normally to be deselected for any address but to be able to assume the address of any disconnected row or column. Disconnection of the standard decoders and substitution of the spare decoders are made possible by appropriate inclusion of fusible links which can be selectively opened by laser irradiation.

REFERENCES:
patent: 3735368 (1973-05-01), Beausoleil
patent: 4051354 (1977-09-01), Choate

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