Memory with five-transistor bit cells and associated control...

Static information storage and retrieval – Systems using particular element – Flip-flop

Reexamination Certificate

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C365S104000, C365S156000

Reexamination Certificate

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11358161

ABSTRACT:
Memory employing a plurality of five-transistor memory bit cells in a memory matrix and a power supply control circuit that is configured to provide a simultaneous full clear to all of the memory bit cells is described herein.

REFERENCES:
patent: 3644907 (1972-02-01), Gricchi et al.
patent: 4075690 (1978-02-01), Oberman et al.
patent: 4567578 (1986-01-01), Cohen et al.
patent: 4750155 (1988-06-01), Hsieh
patent: 5457638 (1995-10-01), Ashar et al.
patent: 6044010 (2000-03-01), Deschene
patent: 6205049 (2001-03-01), Lien et al.
patent: 6459611 (2002-10-01), Rimondi
patent: 0 344 894 (1989-12-01), None

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