Static information storage and retrieval – Systems using particular element – Semiconductive
Reexamination Certificate
2005-06-07
2005-06-07
Auduong, Gene N. (Department: 2818)
Static information storage and retrieval
Systems using particular element
Semiconductive
C365S185330, C257S051000, C257S313000
Reexamination Certificate
active
06903967
ABSTRACT:
A memory having gate structures adjacent opposing sidewalls of a semiconductor structure including a channel region and a plurality of charge storage locations between the gate structures and the opposing sidewalls. The channel region is located between two current terminal regions, which in one example serve as the source/drain regions. A memory cell can be implemented in an array of memory cells wherein one gate structure is coupled to one word line and the other gate structure is coupled to another word line. In one example, each cell includes four charge storage locations, each for storing one bit of data.
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Mathew Leo
Muralidhar Ramachandran
Steimle Robert F.
Auduong Gene N.
Clingan, Jr. James L.
Dolezal David G.
Freescale Semiconductor Inc.
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