Memory with adjustable access time

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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Details

C365S194000, C365S196000, C365S233100, C711S106000

Reexamination Certificate

active

07042786

ABSTRACT:
A memory comprising a memory array, an address buffer configured to receive an external address, a refresh address counter configured to generate a refresh address, a first circuit configured to detect a distance between the external address and refresh address, and a second circuit configured to generate at least one timing signal for accessing data associated with the external address from the memory array in response to the distance is provided.

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