Memory with a bit line block and/or a word line block for...

Details Memory with a bit line block and/or a word line block for... Memory with a bit line block and/or a word line block for...

2005-09-06

2005-09-06

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Signals

C365S185040

Reexamination Certificate

active

06940764

ABSTRACT:
A method and circuit for blocking unauthorized access to at least one memory cell in a semiconductor memory. The method includes providing a switch and/or a link which assumes an open state when access to the at least one memory cell is to be blocked; and coupling-a data line associated with the at least one memory cell to a constant voltage source in response to the switch or link assuming an open state.

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United Kingdom Examination Report for the corresponding United Kingdom Application No. GB0325521.3, issued on Aug. 20, 2004 (3 pages).

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