Static information storage and retrieval – Read/write circuit – Including signal comparison
Patent
1997-04-21
1998-05-19
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Including signal comparison
36518909, 36518911, 365190, 365203, G11C 1604
Patent
active
057544824
ABSTRACT:
A memory (400) returns all bit lines to a predetermined voltage level optimum for subsequent fast sensing. The memory (400) includes precharge circuitry (106, 108, 110) which begins the precharge operation during the latching phase of a prior access. The precharge circuitry (106, 108, 110) precharges all bit lines, rather than a selected bit line, to the predetermined voltage level prior to address decoding. In order to prevent "walk-up", the memory (400) includes circuitry such as a switched capacitor (138, 140) which draws current from the bit lines to reduce the voltage on a bit line which drove a logic high level in an earlier cycle or which had an increased voltage due to capacitive cross-coupling to an adjacent bit line. The memory (400) may also include devices such as transmission gates (142, 144, 146) to couple together adjacent bit lines and thereby more evenly distribute the precharging.
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Gallun Chad Steven
Morton Bruce Lee
Su Jeffrey Yangming
Hill Daniel D.
Motorola Inc.
Nelms David C.
Nguyen Hien
Polansky Paul J.
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