Memory-unit sense amplifier

Static information storage and retrieval – Read/write circuit – Differential sensing

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Details

365206, 365208, 327 51, 327 52, 327545, 327546, G11C 706

Patent

active

054385474

ABSTRACT:
In a memory unit having a sense amplifier for reading data, the dependence of the memory cell current detection level of the sense amplifier on the power source voltage is restrained. A memory-unit sense amplifier includes a bias circuit (20, 21, 22) for generating an output which mitigates fluctuations in the power source voltage VDD; and a detection result output section (10, 15) which outputs a memory cell current detection result obtained for the purpose of obtaining the value of memory cell data and which has a Pch (P-channel transistor), to the gate of which the output of the bias circuit (20, 21, 22) is connected, whereby fluctuations in the source/gate voltage of the Pch 10 are mitigated so as to restrain the dependence of the memory cell current detection level on the power source voltage.

REFERENCES:
patent: 4916665 (1990-04-01), Atsumi et al.
patent: 5197028 (1993-03-01), Nakai
patent: 5276369 (1994-01-01), Hayakawa et al.
Nekkei Electronics, Sep. 22, 1986, (No. 404) pp. 133-144.

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