Memory unit and memory module using the same

Details Memory unit and memory module using the same Memory unit and memory module using the same

2006-06-06

2006-06-06

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C711S135000, C365S218000

Reexamination Certificate

active

07057918

ABSTRACT:
A memory unit and memory module using the same. The memory module at least has a first memory region with a plurality of memory units. In each memory unit, first and access transistors each have a first terminal coupled to one bit line pair respectively. A latch node is coupled between second terminals of the first and second access transistor to latch data. An OR gate has a first input terminal coupled to a word line, an output terminal coupled to gates of the first and second access transistor, and a second input terminal. The second input terminals of the OR gates in all memory units are coupled to a flush line. Invalidation information is written to the latch nodes in the memory units from the bit line pair when the flush line is activated during a flush operation.

REFERENCES:
patent: 4567578 (1986-01-01), Cohen et al.
patent: 5010518 (1991-04-01), Toda
patent: 5450353 (1995-09-01), Koike
patent: 5845325 (1998-12-01), Loo et al.

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