Memory under test programming and reading device

Details Memory under test programming and reading device Memory under test programming and reading device

1997-03-28

2000-11-14

Wright, Norman M.

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

714 47, 714 48, 714723, 365200, 365201, H02H 305, G11C 2900

Patent

active

06148413&

ABSTRACT:
Programming and reading management architecture, particularly for test purposes, for memory devices of the non-volatile type, comprising at least two memory half-matrices, a bidirectional internal bus for the transmission of data to and from the memory half-matrices, a programming unit for each one of the at least two memory half-matrices, and a data sensing unit. The programming units are adapted to program the at least two memory half-matrices and the data sensing unit and the programming units communicate with the bidirectional internal bus to reroute onto the bus reading data and programming data of the at least two memory half-matrices.

REFERENCES:
patent: 4802166 (1989-01-01), Casagrande et al.
patent: 5022009 (1991-06-01), Terada et al.
patent: 5025344 (1991-06-01), Maly et al.
patent: 5117426 (1992-05-01), McAdams
patent: 5237697 (1993-08-01), Nakano
patent: 5245572 (1993-09-01), Kosonocky et al.
patent: 5388070 (1995-02-01), Frerichs
patent: 5400343 (1995-03-01), Crittenden et al.
patent: 5459734 (1995-10-01), Yokoyama
patent: 5500601 (1996-03-01), Lisart et al.
patent: 5510748 (1996-04-01), Erhart et al.
patent: 5544175 (1996-08-01), Posse
patent: 5621439 (1997-04-01), Okada et al.
patent: 5687178 (1997-11-01), Herr et al.
patent: 5689430 (1997-11-01), Ohno et al.
patent: 5710778 (1998-01-01), Bettman et al.
patent: 5923674 (1999-07-01), Nakadai
IEEE International Solid State Circuits Conference, vol. 36, Feb. 1993, New York, US pp. 42-43, Rosendale et al, "A 13-ns Mb CMOS EPROM Using 1-T FAMOS Technology".

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