Memory trouble relief circuit

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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Details

C714S042000

Reexamination Certificate

active

06967879

ABSTRACT:
When a redundancy circuit is provided to relieve the inferiority of a semiconductor storage device, and then, the semiconductor storage device has no defect, power is inconveniently supplied even to the unused redundancy circuit to generate unnecessary leakage current.A self-diagnosis circuit for a semiconductor storage device is provided to perform the self-diagnosis of the semiconductor storage device upon turning on a power source. Power (2) is supplied to a redundancy circuit part and power (1) is supplied to a circuit part except the redundancy circuit part. When the semiconductor storage device has no defect as a result of the self-diagnosis, a control for turning off the power (2) of the redundancy circuit part is performed.

REFERENCES:
patent: 5862088 (1999-01-01), Takemoto et al.
patent: 5946250 (1999-08-01), Suzuki
patent: 6438044 (2002-08-01), Fukuda
patent: 6556479 (2003-04-01), Makuta et al.
patent: 6668348 (2003-12-01), Nakamura
patent: 6711705 (2004-03-01), Yasui
patent: 6762963 (2004-07-01), Inoue et al.
patent: 11-238393 (1999-08-01), None

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