Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2005-04-26
2005-04-26
Elmore, Reba I. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
C711S005000, C711S104000, C711S173000, C711S220000
Reexamination Certificate
active
06886088
ABSTRACT:
The present invention is directed to a memory that allows two simultaneous read requests with improved density. In an aspect of the present invention, a memory module includes at least two primary memory sub-modules and an additional memory sub-module including a sum of values located in the at least two primary memory sub-modules at corresponding addresses. The sum of the additional memory module enables at least two simultaneous read requests to be performed.
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Andreev Alexander E.
Andreev Egor A.
Bolotov Anatoli A.
Scepanovic Ranko
Elmore Reba I.
LSI Logic Corporation
Suiter - West PC LLO
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