Memory testing with preservation of in-use data

Details Memory testing with preservation of in-use data Memory testing with preservation of in-use data

1994-11-15

1995-10-24

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Testing

371 211, G11C 700, G11C 2900

Patent

active

054615887

ABSTRACT:
A method of testing a memory containing data being used by a processor uses a dedicated diagnostic test page (DTP) and diagnostic status page (DSP) in the memory under test to carry out the testing. The DTP is address-tested and pattern-tested first. Then, each page of the memory is in turn copied to the DTP, tested, and then restored from the DTP. During the test, the address of the page being tested is stored in the DSP along with a valid flag and an error detection code (EDC). A recovery procedure uses the information on the DSP to restore memory pages if the test is interrupted.

REFERENCES:
patent: 3655959 (1972-04-01), Chernow et al.
patent: 3813531 (1974-05-01), King et al.
patent: 5157664 (1992-10-01), Waite
patent: 5299202 (1994-03-01), Vaillancourt
patent: 5392294 (1995-02-01), Bosch et al.
patent: 5400342 (1995-03-01), Matsumura et al.

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