Memory testing system and memory module thereof

Details Memory testing system and memory module thereof Memory testing system and memory module thereof

2008-11-13

2010-10-19

Luu, Pho M (Department: 2824)

Static information storage and retrieval

Read/write circuit

Testing

C365S149000, C365S189070, C365S230040, C365S230060

Reexamination Certificate

active

07817485

ABSTRACT:
A testing system with data compressing function includes a third data end, a first encoder, and a second encoder. The testing system receives testing data and testing address for testing if any memory cell fails in a memory. The memory includes a first data end, a second end, and an address end. The first encoder encodes the testing data to the data type of the first data end according to the testing address. The second encoder encodes the testing data to the data type of the second data end according to the testing address. In this way, the corresponding memory cells of the first data and second ends store same testing data.

REFERENCES:
patent: 5640353 (1997-06-01), Ju
patent: 6061262 (2000-05-01), Schultz et al.
patent: 7099221 (2006-08-01), Klein

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