Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2005-02-01
2005-02-01
Chase, Shelly A (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
Reexamination Certificate
active
06851076
ABSTRACT:
The various functions that are desirable for interior test memory within a memory tester are implemented in Memory Sets each serving as the host for one or sometimes more of such functions. For certain classes of testing a portion of interior test memory can be used as a Stimulus Log RAM that operates as an ideal DUT to create the correct conditions that are to exist in an actual DUT after testing. The actual part can then be tested, while the expected receive vectors are taken from the Stimulus Log RAM, and the comparison results sent to an ECR, Tag RAM's, etc., as usual. In this way the test program does not have to create or contain within itself the particular receive vectors that are the expected response from the applied stimulus.
REFERENCES:
patent: 5422892 (1995-06-01), Hii et al.
patent: 6055661 (2000-04-01), Luk
Cook, III John H
Jordan Stephen D
Singh Preet P
Agilent Technologie,s Inc.
Chase Shelly A
Miller Edward L.
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