Memory test circuit and method

Details Memory test circuit and method Memory test circuit and method

2006-12-21

2009-10-13

Trimmings, John P (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S005110, C714S025000, C714S042000, C714S045000, C714S719000, C714S723000, C714S738000, C714S742000, C711S156000, C365S200000, C365S201000

Reexamination Certificate

active

07603595

ABSTRACT:
A memory test circuit according to an embodiment of the invention executes a test on a memory in accordance with a pattern mode signal designating a sub-test pattern included in a test pattern and including a plurality of test actions for the memory, and stores the pattern mode signal as failure information in a failure information storage register. The circuit includes a storage determining circuit determining whether or not to store the failure information in a failure information storage register based on preset failure information storage method information.

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