Memory systems and methods

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S051000

Reexamination Certificate

active

07113418

ABSTRACT:
Memory systems and methods are described. In one embodiment, a circuit board has front and back surfaces. At least one memory device having a plurality of pins is mounted on the front surface of the circuit board. At least one other memory device having a plurality of pins is mounted on the back surface of the circuit board. The memory devices are mounted on the circuit board such that at least some pins from the one memory device align with at least some pins of the other memory device to provide aligned pin pairs. A via is disposed in the circuit board and extends between and connects individual pins of an aligned pin pair.

REFERENCES:
patent: 5996880 (1999-12-01), Chu et al.
patent: 6192431 (2001-02-01), Dabral et al.
patent: 6366972 (2002-04-01), Grebenkemper et al.
patent: 6542393 (2003-04-01), Chu et al.
patent: 2005/0142696 (2005-06-01), Tsai

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Memory systems and methods does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory systems and methods, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory systems and methods will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3593283

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.