Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2006-09-26
2006-09-26
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Interconnection arrangements
C365S051000
Reexamination Certificate
active
07113418
ABSTRACT:
Memory systems and methods are described. In one embodiment, a circuit board has front and back surfaces. At least one memory device having a plurality of pins is mounted on the front surface of the circuit board. At least one other memory device having a plurality of pins is mounted on the back surface of the circuit board. The memory devices are mounted on the circuit board such that at least some pins from the one memory device align with at least some pins of the other memory device to provide aligned pin pairs. A via is disposed in the circuit board and extends between and connects individual pins of an aligned pin pair.
REFERENCES:
patent: 5996880 (1999-12-01), Chu et al.
patent: 6192431 (2001-02-01), Dabral et al.
patent: 6366972 (2002-04-01), Grebenkemper et al.
patent: 6542393 (2003-04-01), Chu et al.
patent: 2005/0142696 (2005-06-01), Tsai
Oberlin William L.
Simpson Mark R.
Venkataraman Srinivas
Dinh Son T.
Hewlett--Packard Development Company, L.P.
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