Memory system with parallel data transfer between host,...

Details Memory system with parallel data transfer between host,... Memory system with parallel data transfer between host,...

2007-04-17

2007-04-17

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Read/write circuit

Simultaneous operations

C365S189050, C710S021000, C710S033000, C710S061000

Reexamination Certificate

active

11082859

ABSTRACT:
A memory system is provided which contributes to improvement in efficiency of a data process accompanying a memory access. A memory system has a rewritable nonvolatile memory, a buffer memory, and a controller. The controller controls, in response to an access request from an external apparatus, first data transfer between the controller and the external apparatus, second data transfer between the controller and the nonvolatile memory, and third data transfer between the controller and the buffer memory, controls transfer from the controller to the buffer memory in the third data transfer and transfer from the buffer memory to the controller in a time sharing manner, and enables the first data transfer or the second data transfer to be performed in parallel with the transfer carried out in the time sharing manner.

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