Memory system with apparatus and method to enable balanced...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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C370S394000, C370S412000, C370S473000

Reexamination Certificate

active

10370550

ABSTRACT:
A memory subsystem includes Data Store0and Data Store1.Each data store is partitioned into N buffers, N>1. An increment of memory is formed by a buffer pair, with each buffer of the buffer pair being in a different data store. Two buffer pair formats are used in forming memory increments. A first format selects a first buffer from Data Store0and a second buffer from Data Store1,while a second format selects a first buffer from Data Store1and a second buffer from Data Store0.A controller selects a buffer pair for storing data based upon the configuration of data in a delivery mechanism, such as switch cell.

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