Memory system having multiple address allocation formats and...

Details Memory system having multiple address allocation formats and... Memory system having multiple address allocation formats and...

2011-08-02

2011-08-02

Nguyen, Hau H (Department: 2628)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Memory allocation

C345S564000, C345S567000, C345S568000, C345S569000, C345S572000

Reexamination Certificate

active

07990391

ABSTRACT:
A memory system having multiple address allocation methods for graphics data in a computer graphics processing system. The memory system includes a plurality of memory arrays, and a format register having a programmable format flag. The status of the format flag indicates the memory address allocation format in which the memory addresses for each of the memory arrays are allocated. An address decoder is coupled to the format register to obtain the status of the format flag in order to determine the address allocation method for an array being accessed. The address decoder is further coupled to receive a requested address for a memory location in one of the memory arrays and then provide a requested memory address to the memory arrays to access. The requested address is translated by the address decoder to the requested memory address according to the memory address allocation format indicated by the format flag status for the memory array.

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