Memory system having improved random write performance

Details Memory system having improved random write performance Memory system having improved random write performance

2007-07-24

2007-07-24

Tran, Michael (Department: 2827)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S230060

Reexamination Certificate

active

11277706

ABSTRACT:
A memory system includes a ferroelectric memory, flash EEPROM, control circuit, and interface circuit. The control circuit is configured to control the ferroelectric memory and flash EEPROM. The interface circuit is configured to communicate externally. Data is programmed in the flash EEPROM by a write unit which is smaller than a block as an erase unit and larger than a page as a program unit. The ferroelectric memory stores a logical address-physical address conversion table using the write unit.

REFERENCES:
patent: 2005/0180729 (2005-08-01), Kihara et al.
patent: 2006/0200617 (2006-09-01), Park
patent: 2007/0033373 (2007-02-01), Sinclair
patent: 2007/0058475 (2007-03-01), Yamagami et al.
patent: 2003-85037 (2003-03-01), None
patent: 2003-256269 (2003-09-01), None

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